<Li> User hardware . </Li> <P> A PCI architecture has no central DMA controller, unlike ISA . Instead, any PCI component can request control of the bus ("become the bus master") and request to read from and write to system memory . More precisely, a PCI component requests bus ownership from the PCI bus controller (usually the southbridge in a modern PC design), which will arbitrate if several devices request bus ownership simultaneously, since there can only be one bus master at one time . When the component is granted ownership, it will issue normal read and write commands on the PCI bus, which will be claimed by the bus controller and will be forwarded to the memory controller using a scheme which is specific to every chipset . </P> <P> As an example, on a modern AMD Socket AM2 - based PC, the southbridge will forward the transactions to the northbridge (which is integrated on the CPU die) using HyperTransport, which will in turn convert them to DDR2 operations and send them out on the DDR2 memory bus . As can be seen, there are quite a number of steps involved in a PCI DMA transfer; however, that poses little problem, since the PCI device or PCI bus itself are an order of magnitude slower than the rest of the components (see list of device bandwidths). </P> <P> A modern x86 CPU may use more than 4 GB of memory, utilizing Physical Address Extension (PAE), a 36 - bit addressing mode, or the native 64 - bit mode of x86 - 64 CPUs . In such a case, a device using DMA with a 32 - bit address bus is unable to address memory above the 4 GB line . The new Double Address Cycle (DAC) mechanism, if implemented on both the PCI bus and the device itself, enables 64 - bit DMA addressing . Otherwise, the operating system would need to work around the problem by either using costly double buffers (DOS / Windows nomenclature) also known as bounce buffers (FreeBSD / Linux), or it could use an IOMMU to provide address translation services if one is present . </P>

Direct memory access is used for high speed i o devices in order to avoid