<Table> <Tr> <Td> </Td> <Td> This article does not cite any sources . Please help improve this article by adding citations to reliable sources . Unsourced material may be challenged and removed . (November 2008) (Learn how and when to remove this template message) </Td> </Tr> </Table> <Tr> <Td> </Td> <Td> This article does not cite any sources . Please help improve this article by adding citations to reliable sources . Unsourced material may be challenged and removed . (November 2008) (Learn how and when to remove this template message) </Td> </Tr> <P> In electrical engineering, noise margin is the amount by which a signal exceeds the minimum amount for proper operation . It is commonly used in at least two contexts: </P> <Ul> <Li> In communications system engineering, noise margin is the ratio by which the signal exceeds the minimum acceptable amount . It is normally measured in decibels . </Li> <Li> In a digital circuit, the noise margin is the amount by which the signal exceeds the threshold for a proper' 0' or' 1' . For example, a digital circuit might be designed to swing between 0.0 and 1.2 volts, with anything below 0.2 volts considered a' 0', and anything above 1.0 volts considered a' 1' . Then the noise margin for a' 0' would be the amount that a signal is below 0.2 volts, and the noise margin for a' 1' would be the amount by which a signal exceeds 1.0 volt . In this case noise margins are measured as an absolute voltage, not a ratio . Noise margins for CMOS chips are usually much greater than those for TTL because the V is closer to the power supply voltage and V is closer to zero . </Li> </Ul>

Which of the following ics has the largest noise margin