<P> Fetching the instruction opcodes from program memory well in advance is known as prefetching and it is served by using prefetch input queue (PIQ). The pre-fetched instructions are stored in data structure - namely a queue . The fetching of opcodes well in advance, prior to their need for execution increases the overall efficiency of the processor boosting its speed . The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete . This architecture was prominently used in the Intel 8086 microprocessor . </P> <P> Pipelining was brought to the forefront of computing architecture design during the 1960s due to the need for faster and more efficient computing . Pipelining is the broader concept and most modern processors load their instructions some clock cycles before they execute them . This is achieved by pre-loading machine code from memory into a prefetch input queue . </P>

The bus interface unit prefetches instructions from memory and store them in