<P> The fundamental operation of most CPUs, regardless of the physical form they take, is to execute a sequence of stored instructions that is called a program . The instructions to be executed are kept in some kind of computer memory . Nearly all CPUs follow the fetch, decode and execute steps in their operation, which are collectively known as the instruction cycle . </P> <P> After the execution of an instruction, the entire process repeats, with the next instruction cycle normally fetching the next - in - sequence instruction because of the incremented value in the program counter . If a jump instruction was executed, the program counter will be modified to contain the address of the instruction that was jumped to and program execution continues normally . In more complex CPUs, multiple instructions can be fetched, decoded and executed simultaneously . This section describes what is generally referred to as the "classic RISC pipeline", which is quite common among the simple CPUs used in many electronic devices (often called microcontroller). It largely ignores the important role of CPU cache, and therefore the access stage of the pipeline . </P> <P> Some instructions manipulate the program counter rather than producing result data directly; such instructions are generally called "jumps" and facilitate program behavior like loops, conditional program execution (through the use of a conditional jump), and existence of functions . In some processors, some other instructions change the state of bits in a "flags" register . These flags can be used to influence how a program behaves, since they often indicate the outcome of various operations . For example, in such processors a "compare" instruction evaluates two values and sets or clears bits in the flags register to indicate which one is greater or whether they are equal; one of these flags could then be used by a later jump instruction to determine program flow . </P> <P> The first step, fetch, involves retrieving an instruction (which is represented by a number or sequence of numbers) from program memory . The instruction's location (address) in program memory is determined by a program counter (PC), which stores a number that identifies the address of the next instruction to be fetched . After an instruction is fetched, the PC is incremented by the length of the instruction so that it will contain the address of the next instruction in the sequence . Often, the instruction to be fetched must be retrieved from relatively slow memory, causing the CPU to stall while waiting for the instruction to be returned . This issue is largely addressed in modern processors by caches and pipeline architectures (see below). </P>

What are the various components of a cpu