<P> Logic redundancy occurs in a digital gate network containing circuitry that does not affect the static logic function . There are several reasons why logic redundancy may exist . One reason is that it may have been added deliberately to suppress transient glitches (thus causing a race condition) in the output signals by having two or more product terms overlap with a third one . </P> <P> Consider the following equation: </P> <Dl> <Dd> Y = A B + A _̄ C + B C . (\ displaystyle Y = AB+ (\ overline (A)) C + BC .) </Dd> </Dl>

In the following gate network which gate is redundant