<Tr> <Td> </Td> <Td> This article does not cite any sources . Please help improve this article by adding citations to reliable sources . Unsourced material may be challenged and removed . (June 2009) (Learn how and when to remove this template message) </Td> </Tr> <P> An address bus is a computer bus (a series of lines connecting two or more devices) that is used to specify a physical address . When a processor or DMA - enabled device needs to read or write to a memory location, it specifies that memory location on the address bus (the value to be read or written is sent on the data bus). The width of the address bus determines the amount of memory a system can address . For example, a system with a 32 - bit address bus can address 2 (4,294,967,296) memory locations . If each memory location holds one byte, the addressable memory space is 4 GB . </P> <P> Early processors used a wire for each bit of the address width . For example, a 16 - bit address bus had 16 physical wires making up the bus . As the buses became wider and lengthier, this approach became expensive in terms of the number of chip pins and board traces . Beginning with the Mostek 4096 DRAM, address multiplexing implemented with multiplexers became common . In a multiplexed address scheme, the address is sent in two equal parts on alternate bus cycles . This halves the number of address bus signals required to connect to the memory . For example, a 32 - bit address bus can be implemented by using 16 lines and sending the first half of the memory address, immediately followed by the second half memory address </P> <P> Accessing an individual byte frequently requires reading or writing the full bus width (a word) at once . In these instances the least significant bits of the address bus may not even be implemented - it is instead the responsibility of the controlling device to isolate the individual byte required from the complete word transmitted . This is the case, for instance, with the VESA Local Bus which lacks the two least significant bits, limiting this bus to aligned 32 - bit transfers . </P>

The width of data bus of 8085 is