<P> Memory - mapped I / O is the cause of memory barriers in older generations of computers, which are unrelated to memory barrier instructions . The 640 KB barrier is due to the IBM PC placing the Upper Memory Area in the 640--1024 KB range within its 20 - bit memory addressing . The 3 GB barrier and PCI hole are manifestations of this with 32 - bit memory addressing; with 64 - bit memory addressing these are usually no longer problems on newer architectures . </P> <Table> A sample system memory map <Tr> <Th> Address range (hexadecimal) </Th> <Th> Size </Th> <Th> Device </Th> </Tr> <Tr> <Th> 0000--7FFF </Th> <Td> 32 KiB </Td> <Td> RAM </Td> </Tr> <Tr> <Th> 8000--80FF </Th> <Td> 256 bytes </Td> <Td> General - purpose I / O </Td> </Tr> <Tr> <Th> 9000--90FF </Th> <Td> 256 bytes </Td> <Td> Sound controller </Td> </Tr> <Tr> <Th> A000--A7FF </Th> <Td> 2 KiB </Td> <Td> Video controller / text - mapped display RAM </Td> </Tr> <Tr> <Th> C000--FFFF </Th> <Td> 16 KiB </Td> <Td> ROM </Td> </Tr> </Table> <Tr> <Th> Address range (hexadecimal) </Th> <Th> Size </Th> <Th> Device </Th> </Tr> <Tr> <Th> 0000--7FFF </Th> <Td> 32 KiB </Td> <Td> RAM </Td> </Tr>

Difference between memory-mapped io and peripheral i/o