<P> A De Morgan symbol can show more clearly a gate's primary logical purpose and the polarity of its nodes that are considered in the "signaled" (active, on) state . Consider the simplified case where a two - input NAND gate is used to drive a motor when either of its inputs are brought low by a switch . The "signaled" state (motor on) occurs when either one OR the other switch is on . Unlike a regular NAND symbol, which suggests AND logic, the De Morgan version, a two negative - input OR gate, correctly shows that OR is of interest . The regular NAND symbol has a bubble at the output and none at the inputs (the opposite of the states that will turn the motor on), but the De Morgan symbol shows both inputs and output in the polarity that will drive the motor . </P> <P> De Morgan's theorem is most commonly used to implement logic gates as combinations of only NAND gates, or as combinations of only NOR gates, for economic reasons . </P> <P> Logic gates can also be used to store data . A storage element can be constructed by connecting several gates in a "latch" circuit . More complicated designs that use clock signals and that change only on a rising or falling edge of the clock are called edge - triggered "flip - flops". Formally, a flip - flop is called a bistable circuit, because it has two stable states which it can maintain indefinitely . The combination of multiple flip - flops in parallel, to store a multiple - bit value, is known as a register . When using any of these gate setups the overall system has memory; it is then called a sequential logic system since its output can be influenced by its previous state (s), i.e. by the sequence of input states . In contrast, the output from combinational logic is purely a combination of its present inputs, unaffected by the previous input and output states . </P> <P> These logic circuits are known as computer memory . They vary in performance, based on factors of speed, complexity, and reliability of storage, and many different types of designs are used based on the application . </P>

Which of these sets of logic gates are designed as universal gates