<Tr> <Th> General purpose </Th> <Td> 32 </Td> </Tr> <Tr> <Th> Floating point </Th> <Td> 32 </Td> </Tr> <P> MIPS (an acronym for Microprocessor without Interlocked Pipeline Stages) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by MIPS Technologies (formerly MIPS Computer Systems). The early MIPS architectures were 32 - bit, with 64 - bit versions added later . There are multiple versions of MIPS: including MIPS I, II, III, IV, and V; as well as five releases of MIPS32 / 64 (for 32 - and 64 - bit implementations, respectively). As of April 2017, the current version is MIPS32 / 64 Release 6 . MIPS32 / 64 primarily differs from MIPS I--V by defining the privileged kernel mode System Control Coprocessor in addition to the user mode architecture . </P> <P> Several optional extensions are also available, including MIPS - 3D which is a simple set of floating - point SIMD instructions dedicated to common 3D tasks, MDMX (MaDMaX) which is a more extensive integer SIMD instruction set using the 64 - bit floating - point registers, MIPS16e which adds compression to the instruction stream to make programs take up less room, and MIPS MT, which adds multithreading capability . </P>

What does mips stand for in computer architecture