<P> Use of a PC that normally increments assumes that what a computer does is execute a usually linear sequence of instructions . Such a PC is central to the von Neumann architecture . Thus programmers write a sequential control flow even for algorithms that do not have to be sequential . The resulting "von Neumann bottleneck" led to research into parallel computing, including non-von Neumann or dataflow models that did not use a PC; for example, rather than specifying sequential steps, the high - level programmer might specify desired function and the low - level programmer might specify this using combinatory logic . </P> <P> This research also led to ways to making conventional, PC - based, CPUs run faster, including: </P> <Ul> <Li> Pipelining, in which different hardware in the CPU executes different phases of multiple instructions simultaneously . </Li> <Li> The very long instruction word (VLIW) architecture, where a single instruction can achieve multiple effects . </Li> <Li> Techniques to predict out - of - order execution and prepare subsequent instructions for execution outside the regular sequence . </Li> </Ul> <Li> Pipelining, in which different hardware in the CPU executes different phases of multiple instructions simultaneously . </Li>

The width of the program counter in an 8051 microcontroller